Subject: [IPFIX] [Technical Errata Reported] RFC5102 (4984)

From: RFC Errata System <[email-masked]>
Date: Thu, 30 Mar 2017 05:45:55 -0700 (PDT)

The following errata report has been submitted for RFC5102,
"Information Model for IP Flow Information Export".

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You may review the report below and at:
http://www.rfc-editor.org/errata_search.php?rfc=5102&eid=4984

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Type: Technical
Reported by: Paul Aitken <[email-masked]>

Section: 5.2.10, appA

Original Text
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Each bit represents an Information Element in the Data Record 
with the n-th bit
representing the n-th Information Element.

Corrected Text
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Each bit represents an Information Element in the Data Record,
with the n-th least significant bit
representing the n-th Information Element.

Notes
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A misunderstand arose as to whether bits were assigned in host order or network order - so clarify that the bits are assigned from the least significant to the most significant, ie right-to-left rather than left-to-right.

Moreover, this clarification applies to IANA's IPFIX registry.

NB RFC 8038 re-uses this definition for mibIndexIndicator. Consistency between the definitions is desirable.

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RFC5102 (draft-ietf-ipfix-info-15)
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Title               : Information Model for IP Flow Information Export
Publication Date    : January 2008
Author(s)           : J. Quittek, S. Bryant, B. Claise, P. Aitken, J. Meyer
Category            : PROPOSED STANDARD
Source              : IP Flow Information Export
Area                : Operations and Management
Stream              : IETF
Verifying Party     : IESG