Subject: iSCSI CRC check clarification

From: "De, Tandra" <[email-masked]>
Date: Tue, 30 Oct 2001 14:08:24 -0800

Julian,
 
I followed few iSCSI CRC checking example threads and the thread
file://www.pdl.cmu.edu/mailinglists/ips/mail/msg05931.html
<file://www.pdl.cmu.edu/mailinglists/ips/mail/msg05931.html>  says that
"Before transmission, the CRC bits must be reflected and complemented";
whereas, the iscsi- 08 draft only mentions about complementing the CRC
before transmission. So attached you will find two software implementation
code examples: crc_reflect.cpp and crc_no_reflect.cpp. 
I ran few test cases with the attached example code and when I do reflect
bits I get
                                0:        ff ff ff ff
                                4:        ff ff ff ff
                                8:        ff ff ff ff
                               12:        ff ff ff ff
                               16:        ff ff ff ff
                               20:        ff ff ff ff
                               24:        ff ff ff ff
                               28:        ff ff ff ff
 
                               32:        43 ab a8 62
in the transmission side, and the reception side I get 0x1c2d19ed.
 
But when I do not bit flip I get
                                0:        ff ff ff ff
                                4:        ff ff ff ff
                                8:        ff ff ff ff
                               12:        ff ff ff ff
                               16:        ff ff ff ff
                               20:        ff ff ff ff
                               24:        ff ff ff ff
                               28:        ff ff ff ff
 
                               32:        46 15 d5 c2
in the transmission side, and the reception side I do get 0x1c2d19ed though.

I like to clarify which implementation we should use so that both Initiator
and Target will be in sync. validating the CRC. I appreciate if you could
verify the attached files to see I am missing anytbing. Also I think that it
would help everyone who are dealing with iSCSI CRC if you could put up the
finalized version of the code in the reflector.
 
Thanks,
Tandra ( [email-masked] <mailto:[email-masked]> )

---

From: "Julian Satran" <[email-masked]>
Date: Wed, 31 Oct 2001 08:54:46 +0200

Tandra,

I am not sure I understand what you are talking about.
The spec clearly states how the CRC should be calculated and what the bit 
order on the wire is.
Perhaps by "reflecting" you are talking about the later.
The examples where checked independently by me and at least 2 other 
persons.

Regards,
Julo

"De, Tandra" <[email-masked]>
31-10-01 00:08
Please respond to "De, Tandra"

        To:     Julian Satran/Haifa/IBM@IBMIL
        cc:     "[email-masked]'" <[email-masked]>, "De, Tandra" 
<[email-masked]>
        Subject:        iSCSI CRC check clarification

Julian,
 
I followed few iSCSI  CRC checking example threads and the thread file://www.pdl.cmu.edu/mailinglists/ips/mail/msg05931.html says  that "Before transmission, the CRC bits must be reflected and 
complemented";  whereas, the iscsi- 08 draft only mentions about 
complementing the CRC before  transmission. So attached you will find two 
software implementation code  examples: crc_reflect.cpp and 
crc_no_reflect.cpp. 
I ran few test cases  with the attached example code and when I do reflect 
bits I  get
                                 0:        ff ff ff  ff
                                 4:        ff ff ff  ff
                                 8:        ff ff ff  ff
                                12:        ff ff ff  ff
                                16:        ff ff ff  ff
                                20:        ff ff ff  ff
                                24:        ff ff ff  ff
                                28:        ff ff ff ff
 
                                32:        43 ab a8 62

                                 0:        ff ff ff  ff
                                 4:        ff ff ff  ff
                                 8:        ff ff ff  ff
                                12:        ff ff ff  ff
                                16:        ff ff ff  ff
                                20:        ff ff ff  ff
                                24:        ff ff ff  ff
                                28:        ff ff ff ff
 
                                32:        46 15 d5 c2
in the transmission  side, and the reception side I do get 0x1c2d19ed 
though. 
 
I like to clarify  which implementation we should use so that both 
Initiator and Target will be in  sync. validating the CRC. I appreciate if 
you could verify the attached files to  see I am missing anytbing. Also I 
think that it would help everyone who are  dealing with iSCSI CRC if you 
could put up the finalized version of the code in  the reflector.
 
Thanks,
Tandra ([email-masked])

#### crc_no_reflect.cpp has been removed from this note on October 31 2001 
by Julian Satran
#### crc_reflect.cpp has been removed from this note on October 31 2001 by 
Julian Satran

---

From: "Julian Satran" <[email-masked]>
Date: Wed, 31 Oct 2001 21:15:12 +0200

Comments in text - Julo

31-10-01 20:52

        To:     Julian Satran/Haifa/IBM@IBMIL
        cc: 
        Subject:        RE: iSCSI CRC check clarification

Julian,me
Thanks for you reply. First of all I am not so clear understanding the 
spec.
By "reflecting" I meant to ask whether to bit swap the CRC first, and then
complement it. Then put the CRC value in the wire in network byte order? I
think there might be some confusion the way I have stated my questions.

1. My concern was that in order to match the examples numbers (put up in 
the
Mailing List) I had to bit swap every message byte to calculate the CRC 
and
then before transmitting the CRC, I bit swap the CRC and complement it - 
all
these add quite a bit of latency calculating CRC on every header and data
digests on both sides (Initiator and Target). So there may be a better way
(rather faster way) to do bit swap on every msg byte. I tried to build the
initial CRC table with bit swapped, but by doing this I could not come up
with the examples numbers. I may have missed something here. I like to see 
a
sample code that does the way the spec. says and avoids the overhead.

+++ a friendly advise - you can build your tables so that you will need 
minimal
bit swapping to have the bits get out in network order +++

2. In the 08 draft Appendix A page 151 says
- the coefficients of R(x) are considered a 32 bit sequence
- the bit sequence is complemented and the result is CRC
By reading these lines I wasn't clear whether I should be doing what I 
have
stated in #1.

I have again attached my code of CRC calculation if  you could either 
verify
this or rather reply me a with a sample code, it will be greatly
appreciated. Also this will clear up my misunderstanding.

Thanks again,
Tandra ([email-masked])
+++ there are very good texts on this on the network and free CRC code. 
Dough Otis has put some on this list too+++
-----Original Message-----
From: Julian Satran [mailto:[email-masked]]
Sent: Tuesday, October 30, 2001 10:55 PM
To: [email-masked]
Subject: Re: iSCSI CRC check clarification

Tandra,

Regards,
Julo

Julian,

I followed few iSCSI  CRC checking example threads and the thread
file://www.pdl.cmu.edu/mailinglists/ips/mail/msg05931.html says  that
"Before transmission, the CRC bits must be reflected and
complemented";  whereas, the iscsi- 08 draft only mentions about
complementing the CRC before  transmission. So attached you will find two
software implementation code  examples: crc_reflect.cpp and
crc_no_reflect.cpp.
I ran few test cases  with the attached example code and when I do reflect
bits I  get
                                 0:        ff ff ff  ff
                                 4:        ff ff ff  ff
                                 8:        ff ff ff  ff
                                12:        ff ff ff  ff
                                16:        ff ff ff  ff
                                20:        ff ff ff  ff
                                24:        ff ff ff  ff
                                28:        ff ff ff ff

                                32:        43 ab a8 62

                                 0:        ff ff ff  ff
                                 4:        ff ff ff  ff
                                 8:        ff ff ff  ff
                                12:        ff ff ff  ff
                                16:        ff ff ff  ff
                                20:        ff ff ff  ff
                                24:        ff ff ff  ff
                                28:        ff ff ff ff

                                32:        46 15 d5 c2

Thanks,

#### op_crc.cpp has been removed from this note on October 31 2001 by 
Julian Satran