Subject: iSCSI v8 CRC32C

From: Luben Tuikov <[email-masked]>
Date: Tue, 20 Nov 2001 13:01:03 -0800 (PST)

Hello,

I've been trying to get CRC32C working. I read a few papers,
derived the equations myself, etc, etc, but still cannot get
CRC32C to work...

My basic framework is: (not precomputing a table -- just force):

poly= 1edc6f41;
crc = all 1's;
while more bits in message do
	crc shift left, adding the next message bit at right;
	if carry then
		crc = crc XOR poly;
	end if;
end while;
crc = NOT crc; (e.g. complement the register)

What is wrong with this implementation?

Thanks,
-l

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From: Paul Koning <[email-masked]>
Date: Fri, 23 Nov 2001 11:56:37 -0500

> derived the equations myself, etc, etc, but still cannot get

A good paper to read is the classic Ethernet spec (V1, not 802.3).  In
particular, see appendix C.
 
> 	crc shift left, adding the next message bit at right;
That looks wrong; the Ethernet spec as I read it seems to say you need
"if (carry xor messagebit)"
> crc = NOT crc; (e.g. complement the register)

Re your later note: if you get a 0 remainder, you're missing
something.  Probably the fact that the initial all 1 value is
mathematically equivalent to complementing the initial 32 bits of the
message. 

	 paul

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From: Luben Tuikov <[email-masked]>
Date: Fri, 23 Nov 2001 12:28:50 -0800 (PST)

Paul, thank you for replying.

--- Paul Koning <[email-masked]> wrote:
>
> A good paper to read is the classic Ethernet spec (V1,
> not 802.3).  In particular, see appendix C.

Yes, no doubt it is.

But I think that the iSCSI draft gives enough information
and specs as to the implementation of CRC32C.

> That looks wrong; the Ethernet spec as I read it seems to
> say you need "if (carry xor messagebit)"

The algorithm presented is a classical algorithm on
computing the CRC (i.e. the remainder).

If Ethernet uses a different if-condition then they must be
implementing a slightly different algorithm.

> Re your later note: if you get a 0 remainder, you're
> missing something.

On the contrary -- means that there was no noise or I
struck luck to get undetectable error (1 in 10^-40).

> Probably the fact that the initial all 1
> value is  mathematically equivalent to complementing the
> initial 32 bits of the message. 

As the draft points out, setting the register to all 1's,
is just like complementing the first 32 bits of the message
to 1. E.g. imagine your message always starting with 32
1's.
This is so that runs of 0's at the beginning of the message
are caught.

-- 
Luben Tuikov, Senior Software Engineer, Splentec Ltd.
Bus: 905-707-1954x112, 9-5 EST. Fax: 905-707-1974.

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