Return-Path: X-Sieve: cmu-sieve 2.0 Return-Path: Received: from simpod.COM ([212.150.114.18]) by ece.cmu.edu (8.11.0/8.10.2) with ESMTP id h3O7uXF16378 for ; Thu, 24 Apr 2003 03:56:33 -0400 (EDT) Received: (from yiftach@localhost) by simpod.COM (8.11.0/8.11.0) id h3O73ow02185; Thu, 24 Apr 2003 00:03:50 -0700 Date: Thu, 24 Apr 2003 00:03:50 -0700 Message-Id: <200304240703.h3O73ow02185@simpod.COM> From: Simpod Info To: ipsml@ece.cmu.edu Subject: Enhanced FPGA Prototyping Content-Type: text/html; charset=us-ascii Content-Transfer-Encoding: 7bit Simpod mailer


Today, SoC's are a complex integration of hardware and software that existing verification methodologies do not adequately address

The DeskPOD system bridges logic simulator, FPGA prototype, software debugger and production tester to provide integration from design through to the test floor.

Enhanced FPGA Prototyping

  • Linked FPGA prototype and Verilog - mix simulation and emulation
  • Methodical approach to bringing up the FPGA prototype board
  • Customizable prototype - add components and "cable-in" to your evaluation board
Enhanced Co-Verification
  • Linked Debugger and Verilog - mix simulation and silicon
  • Early access to the target hardware - drive hardware debug with software
  • True co-verification - tradeoff hardware/software before the hardware is complete
Enhanced Silicon Validation
  • Linked Silicon and Verilog - verification test bench validates prototype silicon
  • Production test programs derived directly from the simulation test bench
 
 
For more information, contact us at info@simpod.com

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