Subject: [spring] HCL SRv6 Acceleration on Intel PAC N3000

From: Sai Prasanna G <[email-masked]>
Date: Tue, 3 Mar 2020 19:14:30 +0000

Hi

HCL has offloaded CPU intensive functions for SRv6 on the Intel's N3000 PAC which was done in partnership with Bell Canada.

The HCL solution<https://www.intel.com/content/dam/altera-www/global/en_US/pdfs/literature/solution-sheets/sb-accelerate-srv6-processing.pdf> based on the Intel FPGA PAC N3000<intel.com/pacn3000> supports the SRv6 endpoint behaviors listed below, all of which enable SFC, L2VPN, and L3VPN:

  *   Static proxy (End.AS)
  *   Dynamic proxy (End.AD)
  *   Decapsulation and cross-connect (End.DX)
  *   Decapsulation and specific table lookup (End.DT)

The solution offers a 3x savings in CPU cores - four CPU cores in a hardware-assisted solution, whereas comparable performance to 12 cores with software-based SRv6

To see if hardware-based SRv6 acceleration is right for you, please reach out to me<mailto:[email-masked]> or contact HCL at [email-masked]<mailto:[email-masked]>

Thanks and Best Regards,
Sai Prasanna G
+1 (408) 598 7385

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