## 3.8.4 Z80, Z180 and eZ80 Interrupt Service Routines

The Z80 uses several different methods for determining the correct interrupt vector depending on the hardware implementation. Therefore, SDCC does not attempt to generate an interrupt vector table.

By default, SDCC generates code for a maskable interrupt, which uses a RETI instruction to return from the interrupt. To write an interrupt handler for the non-maskable interrupt, which needs a RETN instruction instead, leave out the interrupt number:

> void nmi_isr (void) __critical __interrupt
> {
> ...
> }

Since interrupts on the Z80 and Z180 are level-triggered (except for the NMI), interruptible interrupt handlers should only be used where hardware acknowledge is available.

Type | Syntax | Behaviour
Interruptible interrupt handler | void f(void) __interrupt | Interrupt handler can be interrupted by further interrupts
Non-interruptible interrupt handler | void f(void) __critical __interrupt(0) | Interrupt handler can be interrupted by NMI only
NMI handler | void f(void) __critical __interrupt | Interrupt handler can be interrupted by NMI only